Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators
Security management for IoT applications is a critical research field, especially when taking into account the performance variation over the very different IoT devices. In this paper, we present high-performance client/server coordinators on low-cost SoC-FPGA devices for secure IoT data collection....
| Main Authors: | , , , , , , |
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| Format: | info:eu-repo/semantics/article |
| Language: | English |
| Published: |
MDPI
2020
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10835/7475 |
| _version_ | 1789406688464338944 |
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| author | Bellemou, Ahmed Mohamed García, Antonio Castillo, Encarnación Benblidia, Nadjia Anane, Mohamed Álvarez Bermejo, José Antonio Parrilla, Luis |
| author_facet | Bellemou, Ahmed Mohamed García, Antonio Castillo, Encarnación Benblidia, Nadjia Anane, Mohamed Álvarez Bermejo, José Antonio Parrilla, Luis |
| author_sort | Bellemou, Ahmed Mohamed |
| collection | DSpace |
| description | Security management for IoT applications is a critical research field, especially when taking into account the performance variation over the very different IoT devices. In this paper, we present high-performance client/server coordinators on low-cost SoC-FPGA devices for secure IoT data collection. Security is ensured by using the Transport Layer Security (TLS) protocol based on the TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 cipher suite. The hardware architecture of the proposed coordinators is based on SW/HW co-design, implementing within the hardware accelerator core Elliptic Curve Scalar Multiplication (ECSM), which is the core operation of Elliptic Curve Cryptosystems (ECC). Meanwhile, the control of the overall TLS scheme is performed in software by an ARM Cortex-A9 microprocessor. In fact, the implementation of the ECC accelerator core around an ARM microprocessor allows not only the improvement of ECSM execution but also the performance enhancement of the overall cryptosystem. The integration of the ARM processor enables to exploit the possibility of embedded Linux features for high system flexibility. As a result, the proposed ECC accelerator requires limited area, with only 3395 LUTs on the Zynq device used to perform high-speed, 233-bit ECSMs in 413 µs, with a 50 MHz clock. Moreover, the generation of a 384-bit TLS handshake secret key between client and server coordinators requires 67.5 ms on a low cost Zynq 7Z007S device. |
| format | info:eu-repo/semantics/article |
| id | oai:repositorio.ual.es:10835-7475 |
| institution | Universidad de Cuenca |
| language | English |
| publishDate | 2020 |
| publisher | MDPI |
| record_format | dspace |
| spelling | oai:repositorio.ual.es:10835-74752023-04-12T19:26:25Z Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators Bellemou, Ahmed Mohamed García, Antonio Castillo, Encarnación Benblidia, Nadjia Anane, Mohamed Álvarez Bermejo, José Antonio Parrilla, Luis TLS ECC AES FPGA Embedded Linux Security management for IoT applications is a critical research field, especially when taking into account the performance variation over the very different IoT devices. In this paper, we present high-performance client/server coordinators on low-cost SoC-FPGA devices for secure IoT data collection. Security is ensured by using the Transport Layer Security (TLS) protocol based on the TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 cipher suite. The hardware architecture of the proposed coordinators is based on SW/HW co-design, implementing within the hardware accelerator core Elliptic Curve Scalar Multiplication (ECSM), which is the core operation of Elliptic Curve Cryptosystems (ECC). Meanwhile, the control of the overall TLS scheme is performed in software by an ARM Cortex-A9 microprocessor. In fact, the implementation of the ECC accelerator core around an ARM microprocessor allows not only the improvement of ECSM execution but also the performance enhancement of the overall cryptosystem. The integration of the ARM processor enables to exploit the possibility of embedded Linux features for high system flexibility. As a result, the proposed ECC accelerator requires limited area, with only 3395 LUTs on the Zynq device used to perform high-speed, 233-bit ECSMs in 413 µs, with a 50 MHz clock. Moreover, the generation of a 384-bit TLS handshake secret key between client and server coordinators requires 67.5 ms on a low cost Zynq 7Z007S device. 2020-01-17T07:19:49Z 2020-01-17T07:19:49Z 2019-10-30 info:eu-repo/semantics/article 2079-9292 http://hdl.handle.net/10835/7475 en https://www.mdpi.com/2079-9292/8/11/1238 Attribution-NonCommercial-NoDerivatives 4.0 Internacional http://creativecommons.org/licenses/by-nc-nd/4.0/ info:eu-repo/semantics/openAccess MDPI |
| spellingShingle | TLS ECC AES FPGA Embedded Linux Bellemou, Ahmed Mohamed García, Antonio Castillo, Encarnación Benblidia, Nadjia Anane, Mohamed Álvarez Bermejo, José Antonio Parrilla, Luis Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators |
| title | Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators |
| title_full | Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators |
| title_fullStr | Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators |
| title_full_unstemmed | Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators |
| title_short | Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators |
| title_sort | efficient implementation on low-cost soc-fpgas of tlsv1.2 protocol with ecc_aes support for secure iot coordinators |
| topic | TLS ECC AES FPGA Embedded Linux |
| url | http://hdl.handle.net/10835/7475 |
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